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| BCM8112 PRODUCT Brief OF BENEFITS 1 6 - B I T LV D S A N D 6 4 - B I T LV P E C L I N T E R FA C E BCM8112 FEATURES SUMMARY 64:16 MUX with single-ended LVPECL * 155.52/166.65-Mbps data inputs and LVDS 622.08/644.45-Mbps differential data outputs 16:64 DEMUX * differential datawith LVDS 622.08/644.45 Mbps series inputs and 155.52/166.65 Mbps terminated logic (STL) single-ended data outputs Compliant with standards such * Internetworkingindustry(OIF), Telcordia,as: Optical Forum and ITU-T standards. High level * solutions. of integration allows for higher port density CMOS-based device * economy of scale. uses the most effective silicon Low power consumption * external cooling sources. eliminates the need for * Target applications: * OC-192/STM-64 transmission equipment * SONET/SDH optical modules * ADD/DROP multiplexers * Digital cross-connects * ATM switch backbone * SONET test equipment * Terabit routers * Edge routers * On-chip 64 x 9 FIFO to eliminate system timing issues * Core power supply: 1.8V I/O power * CMOS supplies: 1.8V LVDS, 3.3V STL, and 3.3V * Power consumption: 1700 mW typical * Standard CMOS fabrication process * 452-pin BGA package Application Block Diagram ORX 9.953/10.664 Gbps BCM8111 622.08/666.51 Mbps BCM8112 OTX BCM8110 OC-192 ASIC 155.52/ 166.63 Mbps BCM8112 OVERVIEW Interface Block Diagram LCKDET_CMU RESET CLK155TIP CLK155TIN 155.52/166.63 MHz LVPECL FIFO Control OVF Write Pointer INPUT REGISTER 64X9 FIFO DPI0 64:16 MUX Output Retime DLO0P DLO0N 622.08/666.51 Mbps LVDS DLO15P DPI63 155.52/166.63 Mbps LVPECL Read Pointer DLO15N CLK622TIP CLK622TIN 622.08/666.51 Mbps LVDS Divide by 4 CLK622TOP CLK622TON 622.08/666.51 MHz LVDS CLK155TOP CLK155TON 155.52/166.63 MHz STL OUTPUT REGISTER 16:64 DEMUX DLI0P DLI0N DPO0 155.52/166.63 Mbps STL DLI15P DLI15N 622.08/666.51 Mbps LVDS DPO63 CLK622RIP CLK622RIN 622.08/666.51 MHz LVDS Divide by 4 CLK155ROP CLK155RON 155.52/166.63 MHz STL The BCM8112 16/64 LVDS/LVPECL interface is a fully integrated, 64:16 MUX and 16:64 DEMUX. The low-speed, 64bit interface operates at 155.52/166.65 Mbps, and the highspeed, 16-bit interface operates at 622.08/644.45 Mbps. The 64bit input interface is LVPECL, while the 64-bit output interface is STL. Both the 16-bit input and output interfaces are LVDS. An on-chip 64 x 9 FIFO reduces any system timing issues. In OC-192 applications, this device can be used as an interface between a 64-bit LVPECL ASIC and 16-bit LVDS BCM8110/8111 OC-192 transmitter/receiver. The BCM8112 comes in a 35 x 35 mm BGA package. Broadcom(R) and the pulse logo(R) are registered trademarks of Broadcom Corporation and/or its subsidiaries in the United States and certain other countries. For more information please contact us at: Phone: 949-450-8700, FAX: 949-450-8710 Email: info@broadcom.com Visit our web site at: www.broadcom.com (c) 2001 by BROADCOM CORPORATION. All rights reserved. 8112-PB01-R-8.27.01 BROADCOM CORPORATION 16215 Alton Parkway, P.O. Box 57013 Irvine, California 92619-7013 |
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